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Digital Design, With an Introduction to the Verilog HDL, VHDL, and SystemVerilog 6th Global Edition By Morris Mano, Michael Ciletti

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712
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The 6th Global Edition of Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog by M. Morris Mano and Michael D. Ciletti covers fundamental digital design principles alongside parallel tracks for modern hardware description languages. [1, 2, 3]
The textbook is structured into 10 core chapters, outlined below according to its official Table of Contents: [1]
1. Digital Systems and Binary Numbers
  • Digital systems and information representation
  • Binary, octal, and hexadecimal number systems
  • Number-base conversions
  • Arithmetic operations with binary numbers
  • Signed binary numbers and binary codes
2. Boolean Algebra and Logic Gates
  • Basic definitions and axiomatic definition of Boolean algebra
  • Basic theorems, properties, and canonical/standard forms of Boolean functions
  • Digital logic gates and integrated circuits
  • Introduction to hardware description languages (HDLs)
3. Gate-Level Minimization
  • The map method (Karnaugh Maps / K-Maps) for 2, 3, 4, and 5 variables
  • Product-of-sums and sum-of-products simplification
  • Don’t-care conditions
  • NAND and NOR implementations
  • Exclusive-OR (XOR) and parity functions
  • Basic gate-level HDL modeling (Verilog, VHDL, and SystemVerilog) [1]
4. Combinational Logic
  • Analysis and design procedures for combinational circuits
  • Binary adders, subtractors, and multipliers
  • Decimal adders and magnitude comparators
  • Decoders, encoders, multiplexers, and demultiplexers
  • HDL modeling of combinational circuits (dataflow, behavioral, and structural styles) [1, 2, 3]
5. Synchronous Sequential Logic
  • Sequential circuit concepts and latches
  • Flip-flops (SR, D, JK, T) and their triggering characteristics
  • Analysis of clocked sequential circuits
  • State reduction, state assignment, and design procedures
  • HDL modeling for sequential logic [1, 2, 3]
6-10. Advanced Chapters and Laboratory Work
  • Chapter 6: Registers and Counters – Covers shift registers, ripple and synchronous counters, and their HDL modeling.
  • Chapter 7: Memory and Programmable Logic – Explores RAM, ROM, PLAs, PALs, and programmable devices.
  • Chapter 8: Design at the Register Transfer Level (RTL) – Focuses on RTL notation, ASM charts, design examples, and control logic.
  • Chapter 9: Laboratory Experiments – Provides hands-on experimental guidance using ICs and FPGAs.
  • Chapter 10: Standard Graphic Symbols – Details rectangular shape symbols and dependency notation. [1, 2]

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